The industry’s first high-performance serial memory interface architecture standard for DRAM. Serial Port Memory Technology offers low power, high bandwidth, reduced pin count, and overall system cost reductions. It targets mobile and consumer electronics applications with high bandwidth requirements like HD video, 3D gaming, mobile projection, and more.

What is the SPMT Consortium?

The SPMT Consortium is a coalition of leading companies involved in designing and manufacturing mobile and consumer electronic devices, integrated circuits, and IP. This coalition developed the SPMT specification to meet manufacturer and consumer needs for increased functionality and performance while lowering system cost. Examples of the types of data intensive, media-rich functionality consumers are demanding include video (including high-definition video), 3D gaming, multimedia applications and 3D graphics all at a competitive price.

The SPMT Consortium, founded in 2009, will bring the SPMT specification to the mobile and consumer electronics industry and drive industry adoption.

Who are the Consortium promoting members?

The SPMT Consortium is proud to consist of the following leading companies:

ARM
Hynix Semiconductor, Inc.
LG Electronics
Marvell
Samsung Electronics
Silicon Image, Inc.

What is SPMT, LLC?

SPMT, LLC is the entity responsible for administering the SPMT Consortium and licensing the SPMT™ (Serial Port Memory Technology) specification on behalf of the Consortium members. SPMT Consortium/promoter members include ARM; Hynix Semiconductor, Inc.; LG Electronics; Marvell; Samsung Electronics Co., Ltd.; and Silicon Image, Inc. Promoters form the governing body of the organization, and are responsible for developing the SPMT memory interface specification for broad market adoption as an industry standard.

Why Serial Port Memory Technology?

The mobile device market (and the handset market in particular) is under intense competitive pressure to increase functionality, while maintaining or reducing overall system cost. The type of system memory is one major consideration when designing a mobile device; all current memory architectures have varying degrees of tradeoffs that affect overall system cost and performance.

For example, all currently available memories have a parallel interface that requires a high number of connections (pins) to achieve a minimum acceptable performance level for basic mobile device functionality. Think of a freeway that has a carpool lane (serial) and several normal lanes (parallel). The normal lanes have fewer occupants per car (data) and move much more slowly (bandwidth) than the carpool lane. By contrast, the carpool lane has more occupants per car and traffic moves at much higher speeds. One high-speed lane can deliver much more data more quickly than several normal lanes.

Altering the freeway to exclusively contain multiple carpool lanes (ports) would exponentially increase both the amount and speed of data transfers. This is exactly what the SPMT does and here's how it can offer the following key benefits over parallel memory technology:

Addresses customer low power/latency requirements

Low latency exit from power down states
Low latency across all bandwidths
Parallel DRAM mode hides PLL startup latency

Plug-in replacement for LPDDR2 adding Serial Port Memory Technology
Compatible with all LPDDR2 packages
Integrates with existing memory cores

Why SPMT? Because it is the first technology specification to make significant progress toward defining a serial-based memory interface targeted toward commodity DRAM and the mobile market.

What is Serial Port Memory Technology with SerialSwitch™ technology?

Serial Port Memory Technology with SerialSwitch technology is a new memory interface architecture that combines the capabilities of a serial interface and a parallel interface, and offers low power in all bandwidth situations. SerialSwitch technology provides low power during power-down and low-bandwidth environments, but can automatically switch to high-performance SPMT serial mode with bandwidths ranging from 1.6 GB/s in parallel mode to 6.4 GB/s in serial mode. SerialSwitch technology delivers four times the bandwidth pin-for-pin at half the power of existing memory solutions, and offers smooth, low cost migration from parallel to serial memories.

Is the SPMT specification with SerialSwitch technology going to replace the previously announced (10/1/2009) SPMT technology specification?

The enhancements to the specification recently announced represent a major improvement to the key benefits of Serial Port Memory Technology. Going forward, the original specification will be replaced by this enhancement.

What are the benefits to the memory system when using Serial Port Memory Technology with SerialSwitch technology?

The benefits to the memory system include:

Low startup latency of LPDDR2
Low power consumption in low bandwidth situations
Equivalent to LPDDR2
Low pin count
Pin count equivalent to x16 LPDDR2 (including power/ground)
High performance SPMT-I/O mode
Two times higher bandwidth than x32 LPDDR2

What specific benefits does SPMT offer over current memory technology?

The SPMT memory interface offers the following benefits over current parallel memory technologies:

Pin count is reduced by at least 40 percent and often much more.
Memory bandwidth speed capability from 1 GByte per second to at least 12 GByte per second in the current generation.
I/O power consumption savings of approximately 50% over current DRAM technologies.
Single- or multi-port configurations can be used on a single SPMT-enabled memory.

How do SPMT-enabled memories reduce system cost?

Device manufacturers are faced with the challenge and expense of adding more processors to deliver increased functionality to support media-rich applications and content demanded by consumers. This requires faster and denser memory, which tends to drive up both power consumption and system cost. Shifting from parallel memory technology to SPMT-enabled memory reduces system cost as follows:

Reduced pin count translates to a potentially significant per-unit cost reduction. For example, using 40 fewer pins at a cost of one cent per pin lowers system cost by 40 cents. Multiply these 40 cents by the number of units sold and the cost savings add up.
SPMT-enabled memory consumes about half as much power as standard parallel memories. Reduced power consumption means that manufacturers can opt for smaller, cheaper batteries without sacrificing system run time.
Simplified circuit board layouts with fewer parts are both easier and cheaper to design and manufacture. Simplicity is achieved because SPMT-enabled memories require less external support and because one can use single- or multi-port configurations on a single SPMT-enabled memory.

All of the above directly translate into lower overall system cost while maintaining or increasing performance.

When will SPMT-enabled products be available for consumers?

That will depend on the rate of industry adoption. Volume production could start in the 2012 timeframe.

What products or applications will take advantage of SPMT?

SPMT is initially targeted at the mobile phone handset market, since it allows manufacturers to incorporate more media-rich features into a system with higher performance and lower system cost. However, it's expected to expand to other handheld devices such as portable media players, MP3 players, and cameras after the technology is fully embraced. From there, SPMT-enabled memories can migrate to any application that uses DRAM today. The SPMT Consortium's goal is to see SPMT adopted by any application that requires a low-cost, high-bandwidth alternative to currently available memory solutions.

Is the SPMT Consortium targeting the PC market?

The SPMT Consortium is currently focusing on the following markets: Mobile, Consumer Electronics, Networking, and Graphics. The unique serial architecture of SPMT is well suited for these applications. Other markets, such as PC and Server will be addressed in the near future by SPMT.

Which memory technologies are compatible with Serial Port Memory Technology?

SPMT technology currently focuses primarily on DRAM; however, there nothing inherent in the technology precluding it from working with other memory technologies. As SPMT becomes more pervasive, the market opportunities that open up are boundless.

How will SPMT technology be made available to the industry?

The SPMT Consortium will make the SPMT specification available to the industry. Industry adopters that license the technology from the Consortium can create an implementation of the specification and integrate it into a SoC or memory chip. Others may license the specification and create an IP implementation that they may in turn license to memory or SoC manufacturers who do not wish to create their own implementation.

Will SPMT IP be available for licensing?

IP companies may license the specification and create an IP implementation that they may in turn license to memory or SoC manufacturers who do not wish to create their own implementation.

Under what terms will Serial Port Memory Technology be available for licensing? Will royalties be charged?

Membership to the SPMT Consortium includes a license for the SPMT specification. There is an annual membership fee associated with the license which is used to defray administration and promotion cost of the consortium. Unlike other consortiums and associations, the SPMT Consortium will not charge a royalty fee for use of the specification to create SPMT-enabled products.

When will SPMT-enabled products be available for consumers?

That will depend on the rate of industry adoption. Volume production could start as early as 2012.

How do companies get involved in the Consortium?

Membership to the SPMT consortium is open to any and all companies. The Consortium encourages anyone who wishes to join to visit the Consortium's website at www.spmt.org for more information.

Is the Consortium considering participation in other industry initiatives, such as the Mobile Industry Processor Interface Alliance (MIPI) or JEDEC?

The Consortium is actively working with the other industry organizations and standards bodies to find common ground to offer Serial Port Memory Technology as a standard.